Please read the following instructions carefully before assignment submission.
It should be clear that your assignment will not get any credit if:
- The assignment is submitted after the due date.
- The submitted assignment does not open or file is corrupt.
- The assignment is found to be copied from the internet.
- The assignment is found to be copied from other student.
- The assignment submitted is not according to required file format (.doc).
Objective
The objective of this assignment is:
- To assess your overall understanding of Computer Architecture and Organization
- To assess your overall understanding of Computer Instructions
- To assess your overall understanding of Fetch, Decode and Execute Cycle clock in CPU
Note:
- The assignment should be in .doc format.
- Assignment .02 (Graded) covers lecture 8-14. You can also consult reference books for help.
- Students are advised to submit their assignment as early as possible in order to avoid any sort of inconvenience like Load shedding etc.
9
Question 1: Marks 09
Suppose you have six general purpose registers ra, rb, rc, rd, re and rf.
Draw a table to show Structural Register Transfer Language (RTL) for the “NOT” instruction and write all the corresponding steps.
Question 2: Marks 2+2+2 = 6
Briefly explain the following Register Transfer Language (RTL) notations:
1) (op<4 ..0="">=28) : M[R[rb]+ (11α C1<4>)© C1<4 ..0="">] ← R [ra]
2) R [7] ß R [6] ~ R [3]
3) R[1] ←R[0] ©R3]/R[5]
